DEEP REACTIVE ION ETCHING - PREFERRED METHOD
When through silicon via (TSV) sizes are 10µm Ø and 500µm deep for example, the surface specifications play a crucial role in deciding proper metal distribution. Within narrow and deep TSV’s electrolytes have challenges wetting the via surface and in some cases do not even reach local points. There are two dominant TSV manufacturing processes available, deep reactive ion etching (DRIE) and laser ablation, or laser-direct-imaging (LDI). To make high aspect ratio TSV’s you are going to prefer DRIE.
The DRIE process involves etching away using plasma and then deposits a layer of PTFE (terafluoroethylene) in a sequence until the desired dimensions are achieved. With this plasma ablation process, all via holes on the wafer are formed at the same time. DRIE is favorable in high throughput, high volume TSV applications.
With LDI, TSV’s can be programed eliminating some of the lithography steps and coatings, with the ablation rate determined by the lasers’ repetition speed. LDI can operate at a high rate, up to 10,000 TSV’s per second depending upon the dimensions. The LDI process is preferred by low to medium volume production companies that prefer faster set up and changeover times.
The filling of TSV’s, as illustrated in figure 1, starts with a layer of photoresist on a silicon wafer, then a mask is used to place an image on to the wafer. Then, ablate the features of the via, sputter coat and deposit a seed layer, and then electroplate with copper to fill the via.
FIGURE 1
Not shown in figure 1 is the additional wafer thinning, such as backgrinding or wet/dry etch required to complete the process (see Applied Watts backgrinding blog or AW data sheet).
POTENTIAL CHALLENGES WITH LDI TSV’s
Creating through-holes in a vertical pattern with smooth sidewalls in silicon is a critical fabrication step. With a high etch rate, DRIE provides almost vertical through-holes with the required smooth surfaces. However, hydrophilic characteristic of the smoother surface must be properly enhanced to be efficiently wetted by the copper electrolytes.
Smooth vertical through-holes are essential to allow conductive material to properly fill completely (Fig 2.). An incomplete metal fill with potential voids, will lead to short-circuiting affecting performance of the device overall. If you’re not sure about the grain size of your metal being deposited, a rough surface in the via will almost certainly compromise the electrical properties as well.
FIGURE 2
Contact Applied Watts today for more information and let us contribute to your manufacturing process.
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